DARPA Taps Draper to Develop Design Tools for Electronic Systems
CAMBRIDGE, Mass. — The Defense Advanced Research Projects Agency (DARPA) awarded Draper a contract of up to $9.8 million, dependent on successful completion of milestones, to develop hardware design tools with built-in cyber security and trusted computing capabilities to counter software cyber vulnerabilities in military and commercial electronic systems. DARPA awarded Draper the contract under its System Security Integrated Through Hardware and Firmware (SSITH) program.
Electronic system security has become a critical area of concern for the U.S. Department of Defense (DoD) and the broader U.S. population. Current efforts to provide electronic security largely rely on software, which can be inadequate if it fails to address the underlying hardware vulnerability. Draper’s cyber-security technology has proven itself an effective information protection solution that leverages the commercial processing ecosystem enabling adoption of state of the art technology for mission success.
Creative hackers can develop new ways to exploit how software accesses hardware, which can start a continuous cycle of exploitation, patching and subsequent exploitation. Instead, Draper’s contribution to the DARPA SSITH program is designed to focus on hardware security at the microarchitecture level. Draper’s key development in this area is a powerful, flexible and cyber resilient embedded processor chip called the Inherently Secure Processor (ISP). Under SSITH, Draper aims to build on the momentum of the ISP with a goal to develop architectures and design tools to provide flexible solutions applicable to DoD and commercial electronic systems.
“Draper’s cybersecurity capabilities and Inherently Secure Processor enable us to provide silicon chip developers and manufacturers with a design that embeds security directly into hardware at the processor level,” said Paul Rosenstrach, principal director of special programs at Draper. “ISP hardware enforces customizable software-defined security rules, enabling system designers to develop individual policies that fit their application.”
The Inherently Secure Processor can be implemented with any Reduced Instruction Set Computer (RISC) processor and is currently optimized for the latest generation RISC-V architecture as a co-processor solution. It can be easily customized for an individual customer’s embedded system, and features adaptable and updatable technology, providing customers with longevity and resiliency into the future.
Under the SSITH program, Draper plans to develop architectures and design tools that have the potential of enabling system-on-chip designers to safeguard hardware against all seven known common weakness enumeration (CWE) classes of hardware vulnerabilities that hackers can exploit through software. CWE classes will be formalized to support the development of provably secure micropolicies that will be composed into a flexible policy suite to suit users requirements. Security measures may include secure boot, cryptography, metadata tagging, formal verification, anomalous state detection and security through compartmentalization.
Draper’s heritage of cyber security expertise is built on a foundation of secured and assured systems. The company’s defense microelectronics expertise includes development of new technologies to safeguard the U.S. military electronics supply chain from substandard, used and counterfeit electronics.